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A low power receiver for a wireless hearing aid system working in the 174-223 MHz range has been implemented in a 0.8 μm BiCMOS technology. The chip comprises LNA, RF-mixer, variable-gain IF-amplifier, and demodulator, which consists of digital phase-shifter and I/Q IF-mixers, 5th order Bessel filters, and DC-amplifiers. Merely 667 μA including biasing is consumed for the reception of an 8-ary PSK signal with 336 kbit/s.
Date of Conference: 2002