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MRAM-writing circuitry to compensate for thermal-variation of magnetization-reversal current

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7 Author(s)
T. Honda ; Silicon Syst. Res. Labs., NEC Corp., Kanagawa, Japan ; N. Sakimura ; T. Sugibayashi ; S. Miura
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MRAM-writing circuitry to compensate for the thermal variation of the magnetization-reversal current (MRC) is proposed. The writing current of the proposed circuitry is designed to decrease in proportion to an increase in temperature. This technique prevents multiple-write (MW) failures from degrading 1Gb MRAM yield where the standard deviation of MRC variation from other origins is less than 5%.

Published in:

VLSI Circuits Digest of Technical Papers, 2002. Symposium on

Date of Conference:

13-15 June 2002