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We introduce a system for TV ghost cancelling. A complete VHDL RTL level design had been developed and fully synthesized for the developed digital-processing chip. A complete behavioral model had been developed and visual simulation had been done using Matlab. The assistant TV interface system had been designed using available off the shelf components that can be integrated in our design. The VHDL code has been targeted for FPGA technology (Altera Xilinx) and standard cell ASIC (Alcatel 0.5 micron technology).