A high performance lattice architecture of 2D discrete wavelet transform for hierarchical image compression

This paper presents a high performance lattice architecture of 2D discrete wavelet transform (DWT), which is scalable to extend to an arbitrary 2D DWT with M taps and J levels. The proposed lattice structure fits in a VLSI implementation due to its regularity and shows the period of N/sup 2//2 to compute an N/spl times/N image because the even and odd rows are processed simultaneously.