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Learning hardware using multiple-valued logic - Part 1: introduction and approach

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5 Author(s)

The authors propose a learning-hardware approach as a generalization of evolvable hardware. A massively parallel, reconfigurable processor speeds up logic operators performed in learning hardware. The approach uses combinatorial synthesis methods developed within the framework of the logic synthesis in digital-circuit-design automation

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Micro, IEEE  (Volume:22 ,  Issue: 3 )