By Topic

The analysis and design of multidimensional FIR perfect reconstruction filter banks for arbitrary sampling lattices

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
E. Viscito ; IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA ; J. P. Allebach

A general analysis of multidimensional multirate filter banks is presented. The approach is applicable to discrete signal spaces of any dimension, to multirate systems based on arbitrary downsampling and upsampling lattices, and for filter banks with any number of channels. A new numerical design procedure is also presented for multidimensional multirate perfect reconstruction filter banks, which is based on methods of nonlinearly constrained numerical optimization. An error function that depends only on the analysis filter impulse response coefficients is minimized, subject to a set of quadratic equality constraints that involve both the analysis and synthesis filter coefficients. With this design framework, it is possible to design a wide variety of filter banks that have a number of desirable properties. The analysis and synthesis filters that result are finite impulse response (FIR) and of equal size. In addition, both paraunitary and nonparaunitary filter banks can be designed with this method. Unlike paraunitary filter banks, nonparaunitary filter banks are capable of performing analysis bank functions more general than band-splitting with flat passband filters

Published in:

IEEE Transactions on Circuits and Systems  (Volume:38 ,  Issue: 1 )