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An adaptive PAM-4 5 Gb/s backplane transceiver in 0.25 μm CMOS

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16 Author(s)
Sonntag, J. ; Accelerant Networks Inc., Beaverton, OR, USA ; Stonick, J. ; Gorecki, J. ; Beale, B.
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This paper describes a novel backplane transceiver, which uses PAM-4 (pulse amplitude modulated four level) signalling and continuously adaptive transmit based equalization to move 5 Gcb/s (channel bits per second) across typical FR-4 backplanes for total distances of up to 50 inches through two sets of backplane connectors. The paper focuses on the implementation of the equalizer and the adaptation algorithms, and includes measured results. The 17 mm2 device is implemented in a 0.25 μm CMOS process, operates on 2.5 V and 3.3 V supplies and consumes 1.2 W.

Published in:
Custom Integrated Circuits Conference, 2002. Proceedings of the IEEE 2002

Date of Conference: 2002

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