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A discrete Fourier transform using switched capacitor circuits in systolic array architecture

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3 Author(s)
R. Raut ; Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada ; B. B. Bhattacharyya ; S. M. Faruque

Basic SC building blocks are introduced and interconnection of these blocks in a systolic array architecture is shown to yield the desired DFT components. Simulation results using implementation on a workstation and SWITCAP program are reported

Published in:

IEEE Transactions on Circuits and Systems  (Volume:37 ,  Issue: 12 )