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Implementing asynchronous circuits using a conventional EDA tool-flow

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1 Author(s)
Sotiriou, C.P. ; Inst. of Comput. Sci., Found. for Res. & Technol. - Hellas, Heraklion, Greece

This paper presents an approach by which asynchronous circuits can be realised with a conventional EDA tool flow and conventional standard cell libraries. Based on a gate-level asynchronous circuit implementation technique, direct-mapping, and by identifying the delay constraints and exploiting certain EDA tool features, this paper demonstrates that a conventional EDA tool flow can be used to describe, place, route and timing-verify asynchronous circuits.

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Design Automation Conference, 2002. Proceedings. 39th

Date of Conference: