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Language design requirements for VHDL-RF/MW/sup TM/

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2 Author(s)
Willis, J. ; FTL Syst. Inc., Rochester, MN, USA ; Johnson, J.

This paper describes design requirements for VHDL-RF/MW/sup TM/. The resulting language design addresses distributed and full-wave interconnect models, frequency-domain modeling and parasitic interactions so as to maintain full conceptual and representational compatibility with VHDL, VHDL-AMS, Verilog, Verilog-AMS and SPICE.

Published in:

Microwave Symposium Digest, 2002 IEEE MTT-S International  (Volume:3 )

Date of Conference:

2-7 June 2002