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Single-event upset in GaAs E/D MESFET logic

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3 Author(s)
B. W. Hughlock ; Boeing Aerosp. & Electron., Seattle, WA, USA ; G. S. LaRue ; A. H. Johnston

The single-event upset (SEU) characterization of GaAs enhancement/depletion (E/D) MESFET logic circuits was experimentally performed for five different logic families. The results indicate a large charge collection volume, independent of the logic family. These results can be attributed to a gate edge effect and an enhanced source-drain charge collection mechanism. The consequence of these effects is to increase the upset rate in space by more than two orders of magnitude. Soft-error rates were estimated for each logic family and spanned the range from 2.3×10-3 to 4.7×10-4 errors/bit-day

Published in:

IEEE Transactions on Nuclear Science  (Volume:37 ,  Issue: 6 )