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This paper describes the first CMOS chip implementation of a GSM base station receiver. This chip consists of two LNA's, switch, mixer, LO buffer amplifier/balun, and RF balun. A CMOS IF amplifier is packaged separately. The 0.25 /spl mu/m CMOS receiver, biased at 3 V, meets DCS1800 specifications and achieves better linearity and noise figure than previously published BiCMOS receivers. Output IP3 (OIP3) of over 25 dBm was obtained for the complete receiver chain, with a noise figure of 3 dB, and gain of 25 dB. This is believed to be the highest OIP3 and lowest NF reported to date for a CMOS receiver that meets GSM base station specifications.