A program called MVSIS (Multi-Valued Sequential Interactive Synthesis) has been developed which optimizes multi-level multi-valued (MV) networks. We describe what such a network is and the capabilities contained in MVSIS. MVSIS is modeled after SIS (Sequential Interactive Synthesis), which synthesizes binary multi-level networks, but the logic network of MVSIS is such that all variables can be multi-valued, each with its own range. Included in MVSIS are almost all the technology-independent transformations of SIS for combinational and sequential logic synthesis as well as transformations specific to multi-valued nodes, such as "merge", "pair-decode" and "encode". MVSIS can read and write BLIF-MV and BLIF (Berkeley Logic Interchange Format) files which describe MV networks and binary networks respectively
Published in:
Multiple-Valued Logic, 2002. ISMVL 2002. Proceedings 32nd IEEE International Symposium on
Date of Conference: 2002