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Design space exploration methodologies for IP-based system-on-a-chip

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3 Author(s)
G. Ascia ; Dipt. di Ingegneria Informatica e delle Telecomunicazioni, Catania Univ., Italy ; V. Catania ; M. Palesi

In this paper we present two new solutions for design space exploration of parameterized systems. The approaches use multi-objective optimisation techniques based on the concept of Pareto-optimality to determine the power/performance trade-off front for a highly parameterized system-on-a-chip for digital camera applications. The approaches used are purely heuristic and a combination of the heuristic approach with the genetic algorithm-based approach. The results obtained demonstrate the effectiveness of the approaches in terms of both validity and efficiency, measured as the number of simulations run

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Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on  (Volume:2 )

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