Modified long channel model for analytical study of DSM circuits

In this paper, we propose a simple modified long channel model for analytical study of deep submicron circuits. The effects of velocity saturation of carrier drift and channel length modulation are modeled explicitly. The proposed model has a form very similar to the long channel model and experiments show that this simple model matches BSIM3 result quite well for very deep submicron MOSFETs. The proposed model is illustrated through the analysis of an inverter for calculations of the logic threshold voltage and the propagation delay.