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This paper treats scheduling tasks on a dynamically and partly reconfigurable device. We propose a coding scheme which represents both temporal schedule of module reconfigurations and task executions and spatial placement of reconfigured modules. Registers for transferring data between tasks are also considered as run-time configured modules, and the highlight of the proposed coding scheme is the mechanism to guarantee nonoverlapping between 3D (spatial×temporal) life-durations of different objects and temporal overlapping between some pairs of modules to complete data transfer. As a design method to optimize schedule on a dynamically and partly reconfigurable device, simulated annealing (SA) based exploration of the solution space constructed by our coding scheme is demonstrated.
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on (Volume:5 )
Date of Conference: 2002