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CMOS dynamic comparators for pipeline A/D converters

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4 Author(s)
Sumanen, L. ; Electron. Circuit Design Lab., Helsinki Univ. of Technol., Finland ; Waltari, M. ; Hakkarainen, V. ; Halonen, K.

Three different CMOS dynamic comparator topologies for pipeline A/D converters, resistive divider, differential pair, and charge distribution comparators, are analyzed. The topologies considered are fully differential, i.e. both sensing and reference voltage inputs are balanced, consist only of a single stage, and feature zero DC power dissipation with a built-in threshold adjusting input stage. Test structures of the comparators, fabricated in 0.35-μm CMOS process, are measured to determine the offset properties of the compared topologies.

Published in:

Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on  (Volume:5 )

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