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Finite-length synthesis filters for non-uniformly time-interleaved analog-to-digital converter

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1 Author(s)
Won Namgoong ; Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA

A fundamental problem with an actual implementation of a time-interleaved analog-to-digital converter (ADC) is the sample-time mismatches among the demultiplexing channels. This problem is expected to worsen with continued scaling of transistor sizes and the need for faster ADC's. Based on the filter bank framework, an approach for designing a finite-length synthesis filter that interpolates in the least-squares sense to obtain uniform samples is presented. Our results suggest that although digital interpolation can be very effective in improving the ADC resolution, achieving arbitrarily high resolution may require synthesis filters that are very complex.

Published in:

Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on  (Volume:4 )

Date of Conference:

2002