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In high-Q, low-sampling rate switched-capacitor filters the main limitation comes from the capacitance spread. A secondary clock, that averages at an integer fraction of the main clock signal, is used to reduce the capacitance spread by a factor of N, relaxing the operational transconductance amplifier (OTA) requirements. The secondary clock is pulse position modulated to reduce the power of alias components. Experimental results obtained from a second-order bandpass switched-capacitor filter breadboard prototype are shown.