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This paper presents a novel design strategy for low-power continuous-time (CT) ΣΔ modulators. The figure of merit (FOM) is used to find the optimal ΣΔ modulator implementation with respect to a minimal power consumption on the one hand and to fulfil a rapid prototyping approach on the other hand. This method compares the power efficiency of different modulator structures and modulator orders with respect to the given design specifications. The efficiency of this strategy is shown by measurement results of a 1.5V 3rd order CT modulator.