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A 50% duty-cycle correction circuit for PLL output

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2 Author(s)
Gawa, T. ; Dept. of Electron. & Inf. Syst., Osaka Univ., Japan ; Taniguchi, K.

A 50% duty-cycle correction circuit was proposed to tighten duty-cycle into an allowable range to increase the yield of PLLs designed with deep submicron design rules. The circuit composed of duty-detection and duty-correction sub-circuits reduces the duty-cycle fluctuation of PLLs originating from the mismatches of devices and transient responses in signal paths. The 50% duty-cycle correction circuit fabricated with a 0.6 μm design rule demonstrated that all the input signals in the range of duty-cycle from 20 to 80% turn out to be duty-cycle fluctuation of 0.21% at the output, achieving one-three hundredths of reduction of duty-cycle fluctuation.

Published in:

Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on  (Volume:4 )

Date of Conference:

2002

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