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Process development of electroplate bumping for ULSI flip chip technology

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5 Author(s)
R. Kiumi ; Precision Machinery Group, Ebara Corp., Kanagawa, Japan ; J. Yoshioka ; F. Kuriyama ; N. Saito
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For flip-chip packaging applications, a fine pitch bump process on LSI wafers is required due to increased chip circuit density, operating speed, and performance. Plating process is suitable for making the fine pitch bumps with high-speed deposition and high reliability. At the same time, lead-free processes, for electronic devices and components, are required to address environmental concerns. Also, high-speed bumping processes have to be developed for mass production, low cost, small footprint, and high throughput. Ebara has developed electroplating technologies for eutectic Sn-Pb solder, high lead solder, lead-free solder, and copper stud bumps on silicon wafers with higher deposition rates. The bumps were fabricated as column or mushroom type using resist plating masks, such as negative, positive spin-on, and dry film photo resists. The results show that Ebara's processes are suitable for mass production, with well-controlled bump geometry.

Published in:

Electronic Components and Technology Conference, 2002. Proceedings. 52nd

Date of Conference:

2002