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Discrete wavelet transform architecture using fast processing elements

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4 Author(s)
Huluta, E. ; Sch. of Inf. Technol. & Eng., Ottawa Univ., Ont., Canada ; Petriu, E.M. ; Das, S.R. ; Al-Dhaher, A.H.

The paper presents a folded architecture for the Discrete Wavelet Transform using fast processing elements. An improved design method allows the optimization of the register allocation scheme resulting in a reduction of the required hardware.

Published in:

Instrumentation and Measurement Technology Conference, 2002. IMTC/2002. Proceedings of the 19th IEEE  (Volume:2 )

Date of Conference:

2002