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A layout synthesis methodology for array-type analog blocks

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4 Author(s)
Van der Plas, G. ; Dept. of Electr. Eng., Katholieke Universiteit Leuven, Leuven-Heverlee, Belgium ; Vandenbussche, J. ; Gielen, G.G.E. ; Sansen, Willy

A methodology is presented for the physical design automation of array-type analog blocks such as encountered in high-speed data converters and other analog circuits. The approach takes into consideration typical analog constraints and offers full flexibility. A three-step procedure (floorplanning, symbolic routing, and technology mapping), of which the last two steps have been automated in a tool called Mondriaan, solves the layout synthesis problem in a fast and technology-independent way. A set of bus and tree device generators complements the tool set. Industrial-strength examples prove that the proposed solution speeds up the generation of high-quality analog layouts significantly

Published in:

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:21 ,  Issue: 6 )

Date of Publication:

Jun 2002

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