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An alternative method to determine effective channel length and parasitic series resistance of LDD MOSFET's

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2 Author(s)
Torres-Torres, R. ; Dept. of Electron., Nat. Inst. for Astrophys., Opt. & Electron., Puebla, Mexico ; Murphy-Arteaga, R.

A new method to determine MOSFET effective channel length and parasitic source/drain series resistance is presented in this paper. Compared to previously reported methods, the one presented here allows the determination of these parameters simultaneously and as a function of gate voltage. The method is based on the iterative solution of a derived linear-region drain current relation. The method is validated with experimental data taken from submicron LDD MOSFETs, and compared with several previously published methods.

Published in:

Devices, Circuits and Systems, 2002. Proceedings of the Fourth IEEE International Caracas Conference on

Date of Conference:

2002