Referenced Items are not available for this document.
The author reviews low-power testing techniques for VLSI circuits. He prefaces this with a discussion of power consumption that gives reasons for and consequences of increased power during test. He ends with a discussion of the opportunity to use such techniques in varying situations
Published in:
Design & Test of Computers, IEEE
(Volume:19
,
Issue:
3
)
Date of Publication: May/Jun 2002
- Page(s):
- 80 - 90
- ISSN :
- 0740-7475
- INSPEC Accession Number:
- 7324303
- Digital Object Identifier :
- 10.1109/MDT.2002.1003802
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 07 August 2002
- Issue Date :
- May/Jun 2002
- Sponsored by :
- IEEE Council on Electronic Design and Automation
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