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Survey of low-power testing of VLSI circuits

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1 Author(s)
Girard, P. ; Lab. of Informatics Robotics & Microelectron., Montpellier, France

The author reviews low-power testing techniques for VLSI circuits. He prefaces this with a discussion of power consumption that gives reasons for and consequences of increased power during test. He ends with a discussion of the opportunity to use such techniques in varying situations

Published in:

Design & Test of Computers, IEEE  (Volume:19 ,  Issue: 3 )