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Scratchpad memory: a design alternative for cache on-chip memory in embedded systems

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5 Author(s)
Banakar, R. ; Indian Inst. of Technol., Delhi, India ; Steinke, S. ; Bo-Sik Lee ; Balakrishnan, M.
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In this paper we address the problem of on-chip memory selection for computationally intensive applications, by proposing scratch pad memory as an alternative to cache. Area and energy for different scratch pad and cache sizes are computed using the CACTI tool while performance was evaluated using the trace results of the simulator. The target processor chosen for evaluation was AT91M40400. The results clearly establish scratchpad memory as a low power alternative in most situations with an average energy reduction of 40%. Further the average area-time reduction for the scratchpad memory was 46% of the cache memory

Published in:

Hardware/Software Codesign, 2002. CODES 2002. Proceedings of the Tenth International Symposium on

Date of Conference:

2002