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An O(log n) VLSI implementation of a parallel sorting algorithm

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2 Author(s)
Dey, S. ; Dept. of Comput. Sci., Southern Illinois Univ., Carbondale, IL, USA ; Srimani, P.K.

A parallel algorithm for sorting is developed which has a time complexity of O(log n) and requires n2/log n processors. The algorithm can be readily mapped onto an SIMD mesh-connected array of processors which has all the features of efficient VLSI implementation. The corresponding hardware algorithm maintains the O(log n) execution time and has a low, O(n ) interprocessor communication time

Published in:

Computers and Communications, 1988. Conference Proceedings., Seventh Annual International Phoenix Conference on

Date of Conference:

16-18 Mar 1988