By Topic

Optimization of resist strip recipe for aluminum metal etch processes

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Mammo, E.G. ; Agere Syst., Allentown, PA, USA ; Singh, N. ; Mananquil, C. ; Myers, D.R.

This paper discusses experimental results used to develop an optimized resist strip process for an Advanced Strip and Passivation (ASP+) chamber on Applied Materials Decoupled Plasma Source (DPS) 5200 metal etch platform. The scope of the experiment is to develop a resist strip process on a new ASIC BiCMOS product. To meet tight capacity schedule, the resist removal process must be relatively short. This experiment does not look for the shortest strip time, but considered various gas flow, passivation, and strip sequences to keep the resist strip time well below the total metal etch time. A design of experiment (DOE) was run to measure the response of key recipe parameters. The parameters evaluated were strip time, passivation time, passivation and strip sequence, CF4 flow, and temperature. The response was the amount of residual resist remaining after the strip process is completed. The result showed that temperature was the major factor in effective resist removal followed by CF4 flow and passivation/strip sequence. A second DOE was run to verify the results and lower margin. Based on the results of the DOE, a robust strip recipe was designed and implemented in manufacturing for all metal etch processes. The new process is shorter than the metal etch process, and does not affect the throughput of the system. Also, no residual resist is found since the new recipe and post-strip inspection procedure was implemented.

Published in:

Advanced Semiconductor Manufacturing 2002 IEEE/SEMI Conference and Workshop

Date of Conference:

2002