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32 taps digitally controlled buffered potentiometer

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3 Author(s)
C. Stanescu ; Essex Com. Ltd., Bucharest, Romania ; A. Tache ; R. Iacob

The paper presents a 32-tap digitally controlled buffered potentiometer designed in a 0.8 μm CMOS process. An up/down counter determines which tap is connected to the output. Output settings are stored in nonvolatile memory. A rail-to-rail op amp is used as unity-gain buffer at the output in order to eliminate the errors given by the load

Published in:

Semiconductor Conference, 2001. CAS 2001 Proceedings. International  (Volume:2 )

Date of Conference:

Oct 2001