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A new latch-based threshold logic family

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5 Author(s)
Padure, M. ; "Politehnica" Univ. of Bucharest, Romania ; Cotofana, S. ; Dan, C. ; Bodea, M.
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This paper presents a new low-power threshold logic family with self lock-out property. The simulated results have shown that, the proposed threshold logic dissipates between 10% and 79% less power and between 57% and 71% less energy, at VDD=5 V, when compared with previous similar threshold logic families. Moreover, at VDD =3.3 V, it has between 12% and 48% less energy and between 34% and 60% less dissipated power in the worst case

Published in:

Semiconductor Conference, 2001. CAS 2001 Proceedings. International  (Volume:2 )

Date of Conference:

Oct 2001