Analysis of static and dynamic behaviour of SiC and Si devices connected in cascode configuration

This paper presents an analysis of the static and dynamic behaviour of a 1.2 kV SiC vertical JFET. The JFET can block voltages up to 1450 V (for V/sub GS/=80 V), with a specific on-resistance as low as 2.3 m/spl Omega/cm/sup 2/. The mixed-mode performance is investigated by coupling the SiC JFET in a cascode circuit with a low power Si MOSFET. Comparing the circuit performance to that of a SiC trench MOSFET, it turns out that the SiC/Si cascode is almost twice faster than the MOSFET. Coupling this with the fact that the SiC/Si cascode pair has better on-state performance, it is concluded that the cascode is a superior alternative to the classical SiC trench MOSFET.