By Topic

A stochastic global net-length distribution for a three-dimensional system-on-a-chip (3D-SoC)

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

The purchase and pricing options are temporarily unavailable. Please try again later.
3 Author(s)
J. W. Joyner ; Georgia Inst. of Technol., Atlanta, GA, USA ; P. Zarkesh-Ha ; J. D. Meindl

A global net-length distribution for three-dimensional system-on-a-chip architectures is derived to quantify the impact of the number of strata, or active layers, on the length of the long global interconnects. Model projections indicate a reduction in the global net length as the square root of the number of strata, thus enabling a significant reduction in chip footprint area, power dissipation, and global cycle time in comparison to a two-dimensional system-on-a-chip. Unlike its homogeneous counterpart, the vertical integration of a heterogeneous system is not limited by the density of interstratal interconnects. The size of the large megacells, especially memory, may restrict the effectiveness of a large number of strata

Published in:

ASIC/SOC Conference, 2001. Proceedings. 14th Annual IEEE International

Date of Conference: