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A 0.5 V power-supply scheme for low power LSIs using multi-Vt SOI CMOS technology

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4 Author(s)
Fuse, T. ; Corp. Res. & Dev. Center, Toshiba Corp., Kawasaki, Japan ; Kameyama, A. ; Ohta, M. ; Ohuchi, K.

Describes a novel power-supply scheme suitable for 0.5V operating LSIs. The system contains the on-chip buck dc-dc converter with over-90% efficiency, 0.5V operating logic, 100MHz operating F/Fs with holding data in the stand-by mode, and the dual-rail level converter. The dc-dc converter TEG, fabricated using 0.35/spl mu/m multi-Vt SOI CMOS process, realized stable recovery characteristics and a final stage efficiency of 92% with 0.5V/10mW output.

Published in:

VLSI Circuits, 2001. Digest of Technical Papers. 2001 Symposium on

Date of Conference:

14-16 June 2001