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An 8-bit 30 MS/s 18 mW ADC with 1.8 V single power supply

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3 Author(s)
T. Sigenobu ; Syst. LSI Div., Mitsubishi Electr. Corp., Japan ; M. Ito ; T. Miki

This paper describes an 8-bit 30 MS/s 18 mW ADC (Analog-to-Digital Converter) with 1.8 V single power supply for battery powered systems. A folding and interpolation architecture with the auto-zeroed amplifiers is newly developed to achieve the low power consumption and the low power supply voltage. A pipelining technique is also introduced to realize that conversion rate with low power consumption. A test chip of the ADC is fabricated in a 0.18 /spl mu/m CMOS process. The experimental results at 30 MS/s shows DNL less than +/$0.5 LSB, INL less than +/- 1.0 LSB and SNDR more than 45 dB with 3 MHz input frequency.

Published in:

VLSI Circuits, 2001. Digest of Technical Papers. 2001 Symposium on

Date of Conference:

14-16 June 2001