By Topic

A floating-body charge monitor circuit for partially depleted SOI CMOS

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Kuang, J.B. ; Adv. Server Dev., IBM Corp., Rochester, MN, USA ; Saccamango, M.J. ; Ratanaphanyarat, S.

This paper presents a floating-body charge monitor technique, which does not require the use of body contacts. This technique improves the performance and timing robustness of MUX-type and SRAM bit line circuits on partially depleted (PD) SOI CMOS. It can also be used as a calibration tool for SOI device models by virtue of its direct body charge monitoring.

Published in:

VLSI Circuits, 2001. Digest of Technical Papers. 2001 Symposium on

Date of Conference:

14-16 June 2001