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Digital vision chips and high-speed vision systems

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2 Author(s)
Ishikawa, M. ; Dept. of Inf. Phys. & Comput., Tokyo Univ., Japan ; Komuro, T.

Conventional image processing has a critical limit of frame rate derived from serial transmission of the video signal. In order to overcome the limit, fully parallel processing architecture without scanning has been proposed. In this paper, vision chips with digital circuits and high speed application systems developed in our laboratory are described.

Published in:

VLSI Circuits, 2001. Digest of Technical Papers. 2001 Symposium on

Date of Conference:

14-16 June 2001