Scheduled System Maintenance:
On Monday, April 27th, IEEE Xplore will undergo scheduled maintenance from 1:00 PM - 3:00 PM ET (17:00 - 19:00 UTC). No interruption in service is anticipated.
By Topic

Open/folded bit-line arrangement for ultra high-density DRAMs

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Takashima, D. ; ULSI Res. Center, Toshiba Corp., Kawasaki, Japan ; Watanabe, S. ; Sakui, K. ; Nakano, H.
more authors

A new open/folded bit-line (BL) arrangement for ultra high-density DRAMs is proposed. The proposed arrangement was successfully verified by the test chip. This arrangement features a 6F/sup 2/ memory cell and relaxed sensing amplifier of 3 times the pitch of BL. The chip size with this arrangement can be reduced to 81.6% of that of the folded BL arrangement, without introducing the complicated memory cell structure and without sacrificing access speed and power dissipation. Moreover, the proposed arrangement has good array noise immunity in scaled DRAMs compared with the folded BL arrangement. This arrangement is one of the leading candidates for ultra high-density DRAMs.

Published in:

VLSI Circuits, 1993. Digest of Technical Papers. 1993 Symposium on

Date of Conference:

19-21 May 1993