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Reducing energy requirements for instruction issue and dispatch in superscalar microprocessors

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1 Author(s)
Ghose, K. ; Dept. of Comput. Sci., State Univ. of New York, Binghamton, NY, USA

Recent studies [MGK 98, Tiw 98] have confirmed that a significant amount of energy is dissipated in the process of instruction dispatching and issue in modern superscalar microprocessors. We propose a model for the energy dissipated by instruction dispatching and issuing logic in modern superscalar microprocessors and validate them through register level simulations and SPICE-measured dissipation coefficients from 0.5 micron CMOS layouts of relevant circuits. Alternative organizations are studied for instruction window buffers that result in energy savings of about 47% over traditional designs.

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Low Power Electronics and Design, 2000. ISLPED '00. Proceedings of the 2000 International Symposium on

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