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An automatic controller extractor for HDL descriptions at the RTL

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2 Author(s)
Liu, C.-N.J. ; Nat. Chiao Tung Univ., Hsinchu, Taiwan ; Jing-Yang Jou

Extracting controlling finite-state machines can significantly reduce state space and thereby speed functional verification. The controller extraction algorithm uses an approach that frees it from restrictions on HDL code writing style

Published in:

Design & Test of Computers, IEEE  (Volume:17 ,  Issue: 3 )