Cart (Loading....) | Create Account
Close category search window
 

Test-set embedding based on width compression for mixed-mode BIST

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Chakrabarty, K. ; Dept. of Electr. & Comput. Eng., Duke Univ., Durham, NC, USA ; Das, S.R.

We present a new test generator circuit (TGC) for mixed-mode built-in self-test (BIST) that embeds a precomputed deterministic test set TD in a longer sequence. The design method employs width compression based on the property of d-compatibles. To demonstrate the feasibility of the TGC design methods, we present experimental data for single stuck-at test sets for the ISCAS 85 circuits and full-scan versions of the ISCAS 89 benchmark circuits. We also achieve significant improvement over another recently-proposed mixed-mode TGC design scheme for BIST

Published in:

Instrumentation and Measurement, IEEE Transactions on  (Volume:49 ,  Issue: 3 )

Date of Publication:

Jun 2000

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.