Referenced Items are not available for this document.
The noise tolerance of new submicron logic families is becoming more and more important for the reliability of high speed architectures. A method for the evaluation of noise robustness must be defined to compare different topologies and help designers in the library cells optimization, The paper describes a methodology for the analysis of self induced noise tolerance based on the statistical simulation of noise sources. This method can be usefully applied in the study of parasitics due to interconnections crosstalk in digital design and to the substrate-coupling in ICs
Published in:
Microelectronics, 1998. ICM '98. Proceedings of the Tenth International Conference on
Date of Conference: 1998
- Page(s):
- 37 - 40
- Meeting Date :
- 14 Dec 1998-16 Dec 1998
- Print ISBN:
- 0-7803-4969-5
- INSPEC Accession Number:
- 6597100
- Conference Location :
- Monastir
- Digital Object Identifier :
- 10.1109/ICM.1998.825562
- Product Type:
- Conference Publications
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