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Peak crosstalk noise estimation in CMOS VLSI circuits

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2 Author(s)
K. T. Tang ; Dept. of Electr. & Comput. Eng., Rochester Univ., NY, USA ; E. G. Friedman

Interconnect between a CMOS driver and receiver can be modeled as a lossy transmission line in high speed CMOS VLSI circuits as transition times become comparable to or less than the time of flight delay of the signal through the interconnect. In this paper, a linear resistor model is used to approximate the CMOS driver stage, and the CMOS receiver is modeled as a capacitor. A closed form expression for the coupling noise between adjacent interconnect is presented to estimate the coupling noise voltage on a quiet line based on the assumption that these interconnections are loosely coupled, where the effect of the coupling noise on the waveform of the active line is small and can be neglected. It is demonstrated that the output impedance of the CMOS driver should be comparable to the interconnect impedance in order to reduce the propagation delay of the CMOS driver stage

Published in:

Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on  (Volume:3 )

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