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A fully asynchronous superscalar architecture

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2 Author(s)
Arvind, D.K. ; Div. of Inf., Edinburgh Univ., UK ; Mullins, R.D.

An asynchronous superscalar architecture is presented based on a novel architectural feature called instruction compounding. This enables efficient dynamic scheduling and forwarding of data based on local information, while maintaining the advantages of asynchrony in terms of exploiting actual delays. Results are presented in which statically and dynamically compounded architectures are compared against an equivalent synchronous superscalar architecture

Published in:

Parallel Architectures and Compilation Techniques, 1999. Proceedings. 1999 International Conference on

Date of Conference:

1999