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Monte Carlo and thermal noise analysis of ultra-high-speed high temperature superconductor digital circuits

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4 Author(s)
M. Jeffery ; Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA ; P. Y. Xie ; S. R. Whiteley ; T. Van Duzer

We model the high temperature superconductor (HTS) rapid single flux quantum (RSFQ) toggle (T) flip-flop including process variations and thermal noise. A Monte Carlo method is used to calculate the theoretical yield of the circuit at speeds ranging from 1-83 GHz and for various process parameter spreads. Thermal noise is also included in the simulations and we calculate bit error rates at 1-150 GHz as a function of temperature. Our results demonstrate quantitatively the difference between HTS layouts with and without parasitic inductance. Furthermore, our simulations suggest that using the existing HTS process with a 250 /spl mu/V I/sub c/R/sub n/ product the T flip-flop operating temperature should be below 40 K in order to obtain bit error rates less than 10/sup -6/ at gigahertz speeds.

Published in:

IEEE Transactions on Applied Superconductivity  (Volume:9 ,  Issue: 2 )