Referenced Items are not available for this document.
A practical methodology that can be applied to optimize the process yield of IC fabrication lines is described. The yield maximization problem is first reformulated into a deterministic design centering problem. Macromodeling and problem decomposition are then applied to solve the design centering problem efficiently. The effectiveness of this methodology is illustrated through a simulation example involving a CMOS process adopted from an industrial line.<
Published in:
Computer-Aided Design, 1989. ICCAD-89. Digest of Technical Papers., 1989 IEEE International Conference on
Date of Conference: 5-9 Nov. 1989
- Page(s):
- 194 - 197
- Meeting Date :
- 05 Nov 1989-09 Nov 1989
- Print ISBN:
- 0-8186-1986-4
- INSPEC Accession Number:
- 3695647
- Conference Location :
- Santa Clara, CA, USA
- Digital Object Identifier :
- 10.1109/ICCAD.1989.76934
- Product Type:
- Conference Publications
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