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Reconfigurable latch controllers for low power asynchronous circuits

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3 Author(s)
M. Lewis ; Dept. of Comput. Sci., Manchester Univ., UK ; J. Garside ; L. Brackenbury

A method for reducing the power consumption in asynchronous micropipeline-based circuits is presented. The method is based around a design for latch controllers in which the operating mode of the pipeline latches (normally open/transparent or normally closed/opaque) can be selected according to the dynamic processing demand on the circuit. Operating in normally-closed mode prevents spurious transitions from propagating along a static pipeline, at the expense of reduced throughput. Tests of the new latch controller circuits on a pipelined multiplier datapath show that reductions in energy per operation of up to 32% can be obtained by changing to the normally-closed operating mode. Estimates suggest that in a typical application which exhibits a variable processing demand, a power reduction of between 16-24% is possible, with little or no impact on maximum throughput

Published in:

Advanced Research in Asynchronous Circuits and Systems, 1999. Proceedings., Fifth International Symposium on

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