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An MPEG-2 video encoder LSI with scalability for HDTV based on three-layer cooperative architecture

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8 Author(s)
M. Ikeda ; NTT Human Interface Labs., Yokosuka, Japan ; T. Kondo ; K. Nitta ; K. Suguri
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This paper proposes a new architecture for a single-chip MPEG-2 video encoder with scalability for HDTV and demonstrates its flexibility and usefulness. The architecture based on three-layer cooperation provides flexible data-transfer that improves the encoder from the standpoints of versatility, scalability, and video quality. The LSI was successfully fabricated in a 0.25 /spl mu/m four-metal CMOS process. Its small size and its low power consumption make it ideal for a wide range of applications, such as DVD recorders, PC-card encoders and HDTV encoders.

Published in:

Design, Automation and Test in Europe Conference and Exhibition 1999. Proceedings

Date of Conference:

9-12 March 1999