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FAAR: A router for field-programmable analog arrays

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2 Author(s)
S. Granesan ; Lab. for Digital Design Environ., Cincinnati Univ., OH, USA ; R. Vemuri

In this paper we address the routability and analog performance issues involved in routing for array-based FPAAs that have single-segment horizontal and vertical routing resources. We then present FAAR (field-programmable analog array router) and describe a routing algorithm developed for the target array-based FPAA architecture. Sequential routing technique is used for routing multi-terminal nets as well as multiple nets. Multi-terminal nets are broken into two-terminal pairs and routed. We use the notion of resource demand as a measure of the effect of a net-route on the routing of the other nets, while the number of programmable switches and the net-crossings are used as the metrics of interconnect parasitics. We present experiments to study the effect of various parameters such as the number of nets, terminals, CABs and I/O cells on the routing as well as the performance degradation. FAAR routes with high efficiency while keeping performance degradation small, and has considerably short execution times

Published in:

VLSI Design, 1999. Proceedings. Twelfth International Conference On

Date of Conference:

7-10 Jan 1999