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Monitoring interface traps by DCIV method

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2 Author(s)
Jin Cai ; Dept. of Electr. & Comput. Eng., Florida Univ., Gainesville, FL, USA ; Chih-Tang Sah

DCIV method is demonstrated as a production monitoring tool for process-residue interface traps. The high sensitivity of the methodology attained from forward-biasing a p-n junction allows routine detection of as few as 100 active interface traps in small area MOS transistors. Examples are given for MOST's from five different sub-half-micron production technologies. The body recombination current shows peaks around the intrinsic surface condition whose amplitude is proportional to the number of active interface traps in the mid-channel region. The variation of the peak amplitude with the forward bias voltage follows exactly the single-energy level formula, from which the interface-trap energy level can be determined to a few tenths of a kT accuracy.

Published in:

IEEE Electron Device Letters  (Volume:20 ,  Issue: 1 )